FIG. 1 is a cross-sectional view illustrating the structure of a III-nitride semiconductor light emitting device in the prior art. The light emitting device includes a substrate 100, a buffer layer 200 epitaxially grown on the substrate 100, an n-type nitride semiconductor layer 300 epitaxially grown on the buffer layer 200, an active layer 400 epitaxially grown on the n-type nitride semiconductor layer 300, a p-type nitride semiconductor layer 500 epitaxially grown on the active layer 400, a p-side electrode 600 formed on the p-type nitride semiconductor layer 500, a aside bonding pad 700 formed on the p-side electrode 600, and an n-side electrode 800 formed on an n-type nitride semiconductor layer 301 which is exposed by mesa-etching at least the p-type nitride semiconductor layer 500 and the active layer 400.
The substrate 100 can use a GaN-based substrate as a homogeneous substrate, and a sapphire substrate, a silicon carbide substrate or a silicon substrate as a heterogeneous substrate, but can use any other substrates on which nitride semiconductor layers can be grown. If the silicon carbide substrate is used, the n-side electrode 800 can be formed on the opposite side of the silicon carbide substrate.
The nitride semiconductor layers epitaxially grown on the substrate 100 are usually grown by means of MOCVD (Metal Organic Chemical Vapor Deposition) method.
The buffer layer 200 serves to reduce differences in lattice constant and the coefficient of thermal expansion between the heterogeneous substrate 100 and the nitride semiconductor. U.S. Pat. No. 5,122,845 discloses a technology in which an AlN buffer layer having a thickness of 100 Å to 500 Å is grown on a sapphire substrate at a temperature ranging from 380° C. to 800° C. U.S. Pat. No. 5,290,393 discloses a technology in which an Al(x)Ga(1-x) N (0≦x<1) buffer layer having a thickness of 10 Å to 5000 Å is grown on a sapphire substrate at a temperature ranging from 200° C. to 900° C. Korean Patent No. 10-0448352 discloses a technology in which a SiC buffer layer is grown at a temperature ranging from 600° C. to 990° C., and an In(x)Ga(1-x)N (0<x≦1) layer is grown on the SiC buffer layer.
In the n-type nitride semiconductor layer 300, at least a region (n-type contact layer) in which the n-side electrode 800 is formed is doped with an impurity. The n-type contact layer is preferably made of GaN and is doped with Si. U.S. Pat. No. 5,733,796 discloses a technology in which an n-type contact layer is doped with a desired doping concentration by controlling a mixing ratio of Si and other source materials.
The active layer 400 is a layer for emitting a photon (light) by recombination of electrons and holes, and is mainly made of In(x)Ga(1-x)N (0<x<1). The active layer 400 is composed of a single quantum well or multi quantum wells. WO02/021121 discloses a technology in which only some of a plurality of quantum wells and barrier layers are doped.
The p-type nitride semiconductor layer 500 is doped with an impurity such as Mg, and has a p-type conductivity through an activation process. U.S. Pat. No.5,247,533 discloses a technology in which a p-type nitride semiconductor layer is activated by means of irradiation of electron beam. U.S. Pat. No.5,306,662 discloses a technology in which a p-type nitride semiconductor layer is activated through annealing at a temperature of 400° C. or more. Korean Patent No.10-0432246 discloses a technology in which NH3 and a hydrazine-based source material are used together as a nitrogen precursor for growing a p-type nitride semiconductor layer, so that the p-type nitride semiconductor layer has a p-type conductivity without an activation process.
The p-side electrode 600 serves to allow the current to be supplied to the entire p-type nitride semiconductor layer 500. U.S. Pat. No. 5,563,422 discloses a technology of a light-transmitting electrode, which is formed almost on the entire p-type nitride semiconductor layer, in ohmic contact with the p-type nitride semiconductor layer, and made of Ni and Au. Meanwhile, the p-side electrode 600 can be formed to have such a thick thickness that the p-side electrode 600 does not transmit light, i.e., the p-side electrode 600 reflects light toward the substrate. A light emitting device using this p-side electrode 600 is called a flip chip. U.S. Pat. No.6,194,743 discloses a technology of an electrode structure including an Ag layer of 20 nm or more in thickness, a diffusion barrier layer covering the Ag layer, and a bonding layer made of Au and Al, which covers the diffusion barrier layer.
In the III-nitride semiconductor light emitting device, the efficiency of a device can be defined as the ratio of the intensity of light generated to external input power. The p-type GaN constituting the p-type nitride semiconductor layer 500 is not good because it has a higher energy bandgap (˜3.3 eV) and a doping efficiency of below 5×1017 atoms/cm3. Further, contact resistance between the p-type nitride semiconductor layer 500 and the p-side electrode 600 adjacent to the p-type nitride semiconductor layer 500 is very high. Accordingly, not only the efficiency of a device is not good, but also a higher voltage is needed in order to have the same intensity of light.
In order to reduce the contact resistance between the p-type nitride semiconductor layer 500 and the aside electrode 600, p-type GaN doped with a high concentration must be formed. It is, however, very difficult to form p-type GaN doped with a high concentration because of a great bandgap and a low doping efficiency (<5×1017atoms/cm3) of the p-type GaN.
A variety of methods have been proposed in order to reduce the contact resistance between the p-type GaN used as the p-type nitride semiconductor layer 500 and the p-side electrode 600. Among them, there is a method in which the p-type nitride semiconductor layer 500 is not made of a single p-type GaN layer, but is formed to have a superlattice structure of p-type GaN/p-type InGaN or p-type GaN/p-type AlGaN, and the concentration of holes, which is significantly higher than the concentration that can be obtained in the single p-type GaN layer, is thus obtained within the superlattice structure through piezoelectric field. This method, however, is not preferred because potential barrier is formed in a vertical direction within the superlattice structure before holes are injected into the active layer.
As another example, there is a method in which a GaAs layer or an AlGaAs layer is grown, which can be doped with a high concentration (>1020 atoms/cm3), between the p-type nitride semiconductor layer 500 and the p-side electrode 600 (U.S. Pat. No.6,410,944). In this method, however, since the bandgap of the GaAs layer or the AlGaAs layer is smaller than that of the visible region, most of light generated from the active layer 400 may be absorbed by the GaAs layer or the AlGaAs layer. Therefore, this method has limited application fields.
As described above, the conventional III-nitride semiconductor light emitting device is disadvantageous in that the efficiency is low because the contact resistance between the p-type nitride semiconductor layer 500 and the p-side electrode 600 is high. In this connection, there is a need for effective means for overcoming this problem.